A CMOS imager includes a focal plane array of pixel cells, each cell includes a photosensor, for example, a photogate, photoconductor or a photodiode overlying a substrate for producing a photo-generated charge in a doped region of the substrate. In a CMOS imager, the active elements of a pixel cell, for example a four transistor pixel, perform the necessary functions of (1) photon to charge conversion; (2) transfer of charge to the floating diffusion region; (3) resetting the floating diffusion region to a known state before the transfer of charge to it; (4) selection of a pixel cell for readout; and (5) output and amplification of a signal representing a reset voltage and a pixel signal voltage based on the photo converted charges. The charge at the floating diffusion region is converted to a pixel output voltage by a source follower output transistor.
FIG. 1 illustrates a block diagram of a CMOS imager device 308 having a pixel array 240 with each pixel cell being constructed as described above. Although not shown in FIG. 1, pixel array 240 includes a plurality of pixels arranged in a predetermined number of columns and rows. The pixels of each row in array 240 are all turned on at the same time by a row select line (not shown), and the pixels of each column are selectively output by respective column select lines (not shown). A plurality of row and column lines are provided for the entire array 240. The row lines are selectively activated by the row driver 245 in response to row address decoder 255 and the column select lines are selectively activated by the column driver 260 in response to column address decoder 270. Thus, a row and column address is provided for each pixel.
The CMOS imager is operated by a control circuit 250 that controls address decoders 255, 270, for selecting the appropriate row and column lines for pixel readout, and row and column driver circuitry 245, 260, which apply driving voltages to the drive transistors of the selected row and column lines. The pixel column signals, which typically include a pixel reset signal Vrst and a pixel image signal Vsig for each pixel are read by sample and hold circuitry (“S/H”) 261 associated with the column driver 260. A differential signal Vrst−Vsig is produced for each pixel and is amplified by amplifier 262 and digitized by analog-to-digital converter 275. The digital signals are fed to an image processor 280 that forms a digital image output.
Exemplary CMOS imaging circuits, processing steps thereof, and detailed descriptions of the functions of various CMOS elements of an imaging circuit are described, for example, in U.S. Pat. Nos. 6,140,630, 6,376,868, 6,310,366, 6,326,652, 6,204,524, and 6,333,205, all assigned to Micron Technology, Inc. The disclosures of each of the forgoing patents are hereby incorporated by reference herein in their entirety.
A schematic diagram of a conventional CMOS APS (active pixel sensor) four-transistor (4T) pixel cell 10 is illustrated in FIGS. 2A and 2B. FIG. 2A is a top-down view of the cell 10; FIG. 2B is a cross-sectional view of the cell 10 of FIG. 2A, taken along line A–A′. The illustrated cell 10 includes a pinned photodiode 13 as a photosensor. Alternatively, the CMOS cell 10 may include a photogate, photoconductor or other photon-to-charge converting device, in lieu of the pinned photodiode 13, as the initial accumulating area for photo-generated charge. The photodiode 13 includes a p+ surface accumulation layer 5 and an underlying n− accumulation region 14 formed in a p-type semiconductor substrate layer 2.
The pixel cell 10 of FIG. 1 has a transfer gate 7 for transferring photocharges generated in the n− accumulation region 14 to a floating diffusion region 3 (i.e., storage region). The floating diffusion region 3 is further connected to a gate 27 of a source follower transistor. The source follower transistor provides an output signal to a row select access transistor having a gate 37 for selectively gating the output signal to a terminal (not shown). A reset transistor having a gate 17 resets the floating diffusion region 3 to a specified charge level before each charge transfer from the n− region 14 of the photodiode 13.
The illustrated pinned photodiode 13 is formed on a p-type substrate 2. It is also possible, for example, to have a p-type substrate base beneath p-wells in an n-type epitaxial layer. The n− accumulation region 14 and p+ accumulation region 5 of the photodiode 13 are spaced between an isolation region 9 and a charge transfer gate 7. The illustrated, conventional pinned photodiode 13 has a p+/n−/p− structure.
The photodiode 13 has two p-type regions 5, 2 having the same potential so that the n− accumulation region 14 is fully depleted at a pinning voltage (Vpin). The photodiode 13 is termed “pinned” because the potential in the photodiode 13 is pinned to a constant value, Vpin, when the photodiode 13 is fully depleted. When the transfer gate 7 is conductive, photo-generated charge is transferred from the charge accumulating n− region 14 to the floating diffusion region 3.
The isolation region 9 is typically formed using a conventional shallow trench isolation (STI) process or by using a Local Oxidation of Silicon (LOCOS) process. The floating diffusion region 3 adjacent to the transfer gate 7 is commonly n-type. A translucent or transparent insulating layer (not shown) may also be formed over the pixel cell 10.
Additionally, impurity doped source/drain regions 32, having n-type conductivity, are provided on either side of the transistor gates 17, 27, 37. Conventional processing methods are used to form contacts (not shown) in an insulating layer to provide an electrical connection to the source/drain regions 32, the floating diffusion region 3, and other wiring to connect to gates and form other connections in the cell 10.
Image sensors, such as an image sensor employing the conventional pixel cell 10, have a characteristic dynamic range. Dynamic range refers to the range of incident light that can be accommodated by an image sensor in a single frame of pixel data. It is desirable to have an image sensor with a high dynamic range to image scenes that generate high dynamic range incident signals, such as indoor rooms with windows to the outside, outdoor scenes with mixed shadows and bright sunshine, night-time scenes combining artificial lighting and shadows, and many others.
The dynamic range for an image sensor is commonly defined as the ratio of its largest non-saturating signal to the standard deviation of its noise under dark conditions. The dynamic range is limited on an upper end by the charge saturation level of the sensor, and on a lower end by noise imposed limitations and/or quantization limits of the analog-to-digital converter used to produce the digital image. When the dynamic range of an image sensor is too small to accommodate the variations in light intensities of the imaged scene, e.g. by having a low saturation level, image distortion occurs.
Another problem associated with charge generation in conventional pixel cells occurs when the incident light captured and converted into charge during an integration period is greater than the capacity of the photosensor. For example, FIG. 4 illustrates the charge (“Q”) readout possible for a conventional pixel cell 10, having a photosensor, over time. At a time, t0 the integration period for the pixel cell 10 is started. A pixel cell's maximum charge capacity Qs may be reached at a relatively low level of illumination, which causes the pixel cell to be easily saturated, thereby limiting the dynamic range of the pixel. Once the sensing region (photodiode 13) reaches saturation, (time t1) the cell has generated Qs charge. Any additional photon-to-charge conversion will require some charge leakage to escape the photodiode 13 region. Often times this leakage causes charges to migrate to adjacent pixel cells causing cross-talk.
Additionally, when the charges generated during an integration period are output from the photosensor during sampling, a small amount of charge is left over in the photosensor. The residual charge may cause the photosensor to exceed its maximum capacity, thereby causing excess charge to overflow to adjacent pixels. This undesirable phenomenon is known as blooming and results in a number of vertical and/or horizontal streaks in the resultant output image.
One solution that has been suggested to overcome the above problems, is to provide the pixel cell 50 with an anti-blooming transistor 47, as shown in FIG. 3 and as described in a U.S. Provisional Application No. 60/243,898. As shown in FIG. 3, the pixel cell 50 is similar to the 4T pixel cell 10 of FIGS. 2A and 2B, but has an additional transistor 47, for reducing the blooming phenomenon just described. During an integration period for the pixel cell 50, when the sensing region 41 (which may be any of a photodiode, photogate, or photoconductor) becomes saturated with charge, the anti-blooming (AB) transistor 47 transfers some of the excess charge to a drain area 49 associated with the AB transistor 47. The proposed design is effective for increasing the dynamic range over the conventional pixel cell 10, however, the proposed pixel cell 50 also has at least one drawback.
The drawback associated with the FIG. 3 cell 50, is that CMOS transistors have a high deviation in threshold voltage Vth from wafer to wafer, and often from transistor to transistor. The deviation is created to a large extent by the gate oxide layer. For example, the gate oxide layer can assimilate floating charges that make it difficult to precisely control operating transistor characteristics. This deviation leads to an uncertainty in the amount of charge stored from pixel cell to pixel cell since the threshold voltage Vth of each transistor, including the anti-blooming transistor, could vary. The variance of charge storage from pixel cell to pixel cell leads to fixed pattern noise (FPN) in an imager array resulting in diminished image quality because of the non-uniformity of barrier heights between pixels.
An optimal pixel cell has a high dynamic range and low fixed pattern noise. There is needed, therefore, a pixel cell having improved saturation response and lower potential for blooming, but also having fixed pattern noise at least as low as a conventional 4T pixel. There is also a need for a simple method of fabricating the desired pixel.